MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1278

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programming the BCH/GPMI Interfaces
Conceptually, an APHB DMA Channel 4, 5, 6, or 7 command chain with seven command
structures linked together is used to perform the BCH decode operation (as shown in
16-10).
To use the BCH decoder with the GPMI's DMA, create a DMA command chain containing
seven descriptor structures, as shown in
code example that follows it in
perform the following tasks:
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1. Issue NAND read setup command byte (under "CLE") and address bytes (under "ALE").
2. Issue NAND read execute command byte (under "CLE").
The GPMI's DMA command structures controls the BCH decode
operation.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 16-9. BCH Decode Flowchart
Start GPMI DMA chain for next write or read transfer
Return and wait for DMA channel 4 (or 5 or 6 or 7)
Point the GPMI DMA channel 4 (or 5 or 6 or 7) at
HW_APBH_CTRL1_CH0_CMDCMPLT_IRQ = 0
Run the prescribe initialization Sequence
DMA Structure Code
Read status regs and store for processing
HW_BCH_CTRL_COMPLETE_IRQ = 0
the prescribed static DMA sequence
command complete interrupt.
APBH DMA CH4 Command
BCH Complete ISR
Read NAND &
Start the DMA
Complete ISR
BCH Decode
STOP
STOP
Figure 16-10
STOP
Note
Must use SCT clear
Example. The seven DMA descriptors
and detailed in the DMA structure
Must use SCT clear
Freescale Semiconductor, Inc.
Figure