MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1442

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
1442
UNALLOCATED
ROM_SHADOW
SRK_SHADOW
SHADOW_ALT
CRYPTODCP_
CRYPTOKEY_
CUSTCAP_
CUSTCAP
SHADOW
HWSW_
HWSW
ROM3
ROM2
ROM1
ROM0
14 12
Field
OPS
UN2
UN1
UN0
SRK
ALT
ALT
PIN
27
26
25
24
23
22
21
20
19
18
17
16
15
11
10
9
8
7
Status of ROM use region write lock bits (ADDR = 0x1B). When set, word 0x1B in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x1A). When set, word 0x1A in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x19). When set, word 0x19 in the ROM region is locked.
Status of ROM use region write lock bits (ADDR = 0x18). When set, word 0x18 in the ROM region is locked.
Status of alternate bit for HWSW_SHADOW lock
Status of alternate bit for CRYPTODCP lock
Status of alternate bit for CRYPTOKEY lock
Status of Pin access lock bit. When set, pin access is disabled.
Status of OPS region (ADDR = 0x11-0x14) write lock bit. When set, region is locked.
Status of un-assigned (ADDR = 0x17) write-lock bit. When set, un-asigned word at OTP address 0x17 is
locked.
Status of un-assigned (ADDR = 0x16) write-lock bit. When set, un-asigned word at OTP address 0x16 is
locked.
Status of un-assigned (ADDR = 0x15) write-lock bit. When set, un-asigned word at OTP address 0x15 is
locked.
Status of SRK bank (ADDR = 0x20-0x27) write-lock bit. When set, the 8 words (bank4) at OTP addresses
0x20-0x27 are locked.
Value of un-used portion of LOCK word
Status of SRK region shadow register lock. When set, over-ride of DATA-region shadow bits is blocked.
Status of ROM region shadow register lock. When set, over-ride of ROM-region shadow bits is blocked.
Status of Customer Capability region (ADDR = 0x0F) write lock bit. When set, region is locked.
Status of HW/SW region (ADDR = 0x08-0x0E) write lock bit. When set, region is locked.
Status of Customer Capability shadow register lock. When set, over-ride of customer capabality shadow
bits is blocked.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_OCOTP_LOCK field descriptions (continued)
Description
Freescale Semiconductor, Inc.