MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1065

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

memory controller must stop processing requests, the clock must be adjusted, the memory
controller’s timing parameters must be reprogrammed, and then the memory controller can
be restarted. The procedure to follow for changing the clock frequency is as follows:
10. Once the DLL has locked and the PHY has initialized, the memory controller input
11. At this point, the user may bring the memory devices out of self-refresh by clearing the
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1. Ensure that the EMI is idle, which is when the controller_busy signal is low.
2. Put the memory devices into self-refresh mode by asserting the srefresh parameter to
3. Wait until the memory devices have been placed into self-refresh mode, as indicated
4. Mask the DLL lock state change bit (bit 8) in the int_status parameter by setting bit 8
5. Stop the memory controller by writing a ‘b0 to the start parameter.
6. Clear the DLL lock state change bit (bit 8) in the int_status parameter by writing bit 8
7. If the user wishes to use a controller interrupt to signal when the DLL has relocked,
8. The clock frequency may now be changed. Once the clock frequency has stabilized,
9. After all parameters have been updated, restart the EMI by writing a ‘b1 to the start
‘b1. It is imperative that the memory devices be placed into self-refresh through this
parameter and not through any other means. If the devices were placed into self-refresh
mode through one of the low-power modes (programming of the lowpower_control
parameter), then the user should first bring the devices out of that low power mode
manually and then program the srefresh parameter with a ‘b1.
by the cke_status signal. This signal is the value of the control_cke signal inside the
memory controller, delayed by the number of clocks specified in the cke_delay
parameter.
in the int_mask parameter to ‘b1.
in the int_ack parameter to ‘b1. Also, clear any other interrupts in the int_status
parameter by writing to the int_ack parameter.
then unmask the DLL lock state change bit (bit 8) in the int_status parameter by clearing
bit 8 in the int_mask parameter to a ‘b0. If the user wishes to poll the dlllockreg
parameter for this indication, then this step may be skipped.
the user should modify any parameters that may be affected by the frequency change
such as caslat_lin, caslat_lin_gate, any of the timing parameters, and so on. The user
should review the parameters carefully to ensure that all parameters that require
modification are changed.
parameter. This forces the DLL to lock to the new frequency.
signal dfi_init_complete will be asserted. If the user is using a controller interrupt to
monitor DLL re-lock, then wait for a controller interrupt or poll the int_status parameter
for the DLL lock state change bit (bit 8) to be set. If the controller interrupt is not being
used, poll the dlllockreg parameter for the bit to be set.
srefresh parameter to ‘b0. The user does not need to wait to send commands to the
memory controller after clearing the srefresh parameter; the memory controller will
adjust for self-refresh exit time before processing memory commands.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 14 External Memory Interface (EMI)
1065