MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 812

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
HW_PINCTRL_DOE4_TOG: 0xb4C
For pins in bank 4 that are configured as GPIOs, a 1 in this register will enable the
corresponding bit value from HW_PINCTRL_DOUTxx register to be driven out the pin,
and a 0 in this register will disable the corresponding driver.
Address:
Re-
9.4.58 PINCTRL Bank 0 Interrupt Select Register
The Bank 0 Interrupt Select register selects which of the bank 0 pins may be used as interrupt
sources.
HW_PINCTRL_PIN2IRQ0: 0x1000
HW_PINCTRL_PIN2IRQ0_SET: 0x1004
HW_PINCTRL_PIN2IRQ0_CLR: 0x1008
HW_PINCTRL_PIN2IRQ0_TOG: 0x100C
As described earlier in this chapter, any digital I/O pin can be used as an interrupt source.
This register selects which pins in bank 0 can be used to generate interrupts. If the pin is
selected in this register by setting its bit to 1, then detection of the correct level or edge on
the pin (as chosen by the HW_PINCTRL_IRQLEVEL0 and HW_PINCTRL_IRQPOL0
registers) will set the corresponding bit in the HW_PINCTRL_IRQSTAT0 register. If the
pin is additionally enabled in the HW_PINCTRL_IRQEN0 register, then the interrupt will
be propagated to the interrupt collector as interrupt GPIO0. For example, if this register
contains 0x00000014, then pins GPIO0[2] and GPIO0[4] can be used as interrupt pins, and
no other pins in bank 0 will cause bits to be set in the HW_PINCTRL_IRQSTAT0 register.
812
set
Bit
W
R
31
RSRVD1
0
31 21
Field
20 0
DOE
30
0
29
0
(HW_PINCTRL_PIN2IRQ0)
HW_PINCTRL_DOE4
28
0
Empty Description.
Each bit in this register corresponds to one of the 21 pins in bank 4. Setting a bit in this register to one allows
the chip to drive the corresponding pin in GPIO mode.
27
RSRVD1
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
HW_PINCTRL_DOE4 field descriptions
0
22
0
8001_8000h base + B40h offset = 8001_8B40h
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
14
0
13
0
12
0
11
0
DOE
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0