MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2091

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
33.4.5 LCD Interface Current Buffer Address Register
This register indicates the address of the current frame that is being transmitted by LCDIF.
When the LCDIF is behaving as a master, this address points to the address of the current
frame of data being sent out through the LCDIF. When the current frame is done, the LCDIF
block will assert the cur_frame_done interrupt for software to take action. The block will
also copy the HW_LCDIF_NEXT_BUF_ADDR into this bitfield so that the software can
program the next frame address into the HW_LCDIF_NEXT_BUF_ADDR bitfield. This
address must always be double-word aligned.
Address:
Re-
33.4.6 LCD Interface Next Buffer Address Register
This register indicates the address of next frame that will be transmitted by LCDIF.
Freescale Semiconductor, Inc.
set
Bit
W
R
H_COUNT
31
0
ADDR
Field
15 0
Field
31 0
30
0
29
0
(HW_LCDIF_CUR_BUF)
(HW_LCDIF_NEXT_BUF)
HW_LCDIF_CUR_BUF
28
0
HW_LCDIF_TRANSFER_COUNT field descriptions (continued)
Total valid data (pixels) in each horizontal line. The data size is given by the WORD_LENGTH. When input
data is is in YCbCr 4:2:2 format (YCBCR422_INPUT is 1), H_COUNT should be the number of 32-bit words
that should be fetched by the block and the BYTE_PACKING_FORMAT should be 0xF. In 24-bit packed
format (WORD_LENGTH=0x3, BYTE_PACKING_FORMAT=0xF), the H_COUNT must be a multiple of 4
pixels. In 16-bit packed format (WORD_LENGTH=0x0, BYTE_PACKING_FORMAT=0xF), the H_COUNT
must be a multiple of 2 pixels.
start address of current buffer
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
HW_LCDIF_CUR_BUF field descriptions
23
0
22
0
8003_0000h base + 40h offset = 8003_0040h
21
0
20
0
19
0
18
0
17
0
ADDR
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
Chapter 33 LCD Interface (LCDIF)
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
2091
0
0

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