MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 950

MPU POWERQUICC II PRO 473MAPBGA

MPC8308VMAGD

Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC8308VMAGD

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCAL
Quantity:
300
Part Number:
MPC8308VMAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCALE
Quantity:
6
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MPC8308VMAGD
Quantity:
2 000
Part Number:
MPC8308VMAGD400/266
Manufacturer:
FREESCAL
Quantity:
300
Part Number:
MPC8308VMAGDA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8308VMAGDA
Quantity:
4 200
Enhanced Three-Speed Ethernet Controllers
16.5.3.5.2
The MACCFG2 register is written by the user.
register.
Table 16-40
16-66
Offset eTSEC1:0x2_4504; eTSEC2:0x2_5504
Reset
Reset 0 1 1 1 0 0
16–19
20–21
22–23
0–15
Bits
24
25
W
W
R
R Preamble
16
0
Length
PreAM RxEN User defined preamble enable for received frames. This bit is cleared by default.
PreAM TxEN User defined preamble enable for transmitted frames. This bit is cleared by default.
Preamble
I/F Mode
Length
Name
describes the fields of the MACCFG2 register.
19 20 21
MAC Configuration 2 Register (MACCFG2)
Reserved
This field determines the length in bytes of the preamble field preceding each Ethernet start-of-frame
delimiter byte. Values from 0x3 to 0xF are supported by the controller. The default value of 0x7 should
not be altered in order to guarantee reliable operation with IEEE 802.3 compliant hardware.
Reserved
This field determines the type of interface to which the MAC is connected. Its default is 00.
00 Reserved bit mode (not supported) (10 Mbps GENDEC/GPSI)
01 Nibble mode (MII, RGMII) (10/100 Mbps MII, RGMII). For RGMII, ECNTRL.RPM should be set to 1.
10 Reserved
11 Reserved
0 The MAC skips the Ethernet preamble without returning it.
1 The MAC recovers the received Ethernet preamble and passes it to the driver at the start of each
0 The MAC generates a standard Ethernet preamble.
1 If a user-defined preamble has been passed to the MAC it is transmitted instead of the standard
22
0
Mode
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
I/F
received frame. If the preamble is less than 7 bytes, 0s are prepended to pad it to 7 bytes.
preamble. Otherwise the standard Ethernet preamble is generated. The Preamble Length field
should be left at its default setting if a user-defined preamble is transmitted.
23
0
PreAmRxEN PreAmTxEN
Figure 16-36. MACCFG2 Register Definition
Table 16-40. MACCFG2 Field Descriptions
24
0
25
0
Figure 16-36
All zeros
Frame
Huge
26
0
Description
describes the definition for the MACCFG2
Length
check
27
0
28
0
PAD/CRC CRC EN
29
0
Freescale Semiconductor
Access: Read/Write
30
0
Duplex
Full
15
31
0

Related parts for MPC8308VMAGD