MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 588
MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Universal Serial Bus Interface
13.3.1.6
This register is not defined in the EHCI specification. This register describes the overall host/device
capability of the DR module.
Table 13-9
13.3.2
The operational registers are comprised of dynamic control or status registers that may be read-only,
read/write, or read/write-1-to-clear. The following sections define the operational registers.
13.3.2.1
Figure 13-8
register.
13-10
Offset 0x140
Reset
Reset
Offset 0x124
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31–9
Bits
6–5
4–0
8
7
W
W
R
R
W
R
FS2 ATDTW SUTW
31
31
15
0
0
Name
DEN
HC
DC
—
—
provides bit descriptions for the DCCPARAMS register.
Operational Registers
shows the USB command register. The module executes the command indicated in this
Device Controller Capability Parameters (DCCPARAMS)—Non-EHCI
USB Command Register (USBCMD)
14
0
0
Reserved, should be cleared.
Host capable. Always 1, indicating the USB DR controller can operate as an EHCI compatible USB 2.0 host
Device capable. Always 1, indicating the USB DR controller can operate as an USB 2.0 device.
1 Device capability.
0 No device capability (host only).
Reserved, should be cleared.
Device endpoint number. Indicates the number of endpoints built into the device controller. Always 0x3.
Figure 13-7. Device Control Capability Parameters (DCCPARAMS)
13
0
0
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Table 13-9. DCCPARAMS Register Field Descriptions
12
—
0
0
Figure 13-8. USB Command Register (USBCMD)
Figure 13-7
—
ASPE
11
0
0
—
—
10
0
0
shows the DCCPARAMS register.
0
0
9
ASP
24
0
0
8
Description
LR
23
0
0
7
IAA
0
0
6
9
ASE
0
0
HC DC
5
8
1
1
7
PSE
0
4
0
0 0
6
ITC
—
5
FS1
1
0
3
Freescale Semiconductor
0
4
FS0
Access: Read-only
0
0
2
0
DEN
Access: Mixed
0
RST
0
0
1
1
RS
16
0
0
0
0
1
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