MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 313

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 8-29
8.6.8
Pending unmasked interrupts are presented to the core in order of priority according to
interrupt vector that allows the core to locate the interrupt service routine is made available to the core by
interrupt handler software reading SIVCR. The interrupt controller passes an interrupt vector
corresponding to the highest-priority, unmasked, pending interrupt in response to a read of SIVCR.
Table 8-5
8.6.9
The IPIC supports the non-maskable machine check interrupts. When an error interrupt signal is received,
the interrupt controller indicates the source by setting the corresponding SERSR bit. These sources are
listed in
Freescale Semiconductor
Event
Mask
Table
Bit
Bit
lists the encodings for the seven low-order bits of the interrupt vector.
DDR MASK
DDR EVENT
Interrupt Vector Generation and Calculation
Machine Check Interrupts
shows an example of how the masking occurs using a DDR block.
8-23.
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Figure 8-29. DDR Interrupt Request Masking
XX Input (or
XX Event Bits)
Mask
Bit
SIPNR
SIMSR
Integrated Programmable Interrupt Controller (IPIC)
(Other Unmasked Requests)
Table
Request to
the core
8-34. The
8-39