MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 895

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

In this table and in the register figures and field descriptions, the following access definitions apply:
Freescale Semiconductor
0x2_4008–
0x2_4034–
0x2_4118–
0x2_400C
0x2_401C Reserved
0x2_402C DMACTRL—DMA control register
0x2_40FC
0x2_410C Reserved
0x2_413C
0x2_4000 TSEC_ID*—Controller ID register
0x2_4004 TSEC_ID2*—Controller ID register
0x2_4010 IEVENT—Interrupt event register
0x2_4014 IMASK—Interrupt mask register
0x2_4018 EDIS—Error disabled register
0x2_4020 ECNTRL—Ethernet control register
0x2_4024 Reserved
0x2_4028 PTV—Pause time value register
0x2_4030 TBIPA—TBI PHY address register
0x2_4100 TCTRL—Transmit control register
0x2_4104 TSTAT—Transmit status register
0x2_4108 DFVLAN*—Default VLAN control word
0x2_4110 TXIC—Transmit interrupt coalescing register
0x2_4114 TQUEUE*—Transmit queue control register
0x2_4140 TR03WT*—TxBD Rings 0–3 round-robin weightings
eTSEC1
Offset
•
•
•
•
•
Reserved fields are always ignored for the purposes of determining access type.
R/W, R, and W (read/write, read only, and write only) indicate that all the non-reserved fields in a
register have the same access type.
w1c indicates that all of the non-reserved fields in a register are cleared by writing ones to them.
Mixed indicates a combination of access types.
Special is used when no other category applies. In this case the register figure and field description
table should be read carefully.
Reserved
Reserved
Reserved
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
eTSEC Transmit Control and Status Registers
eTSEC General Control and Status Registers
eTSEC 1—Block Base Address 0x2_4000
eTSEC 2—Block Base Address 0x2_5000
Name
Table 16-4. Module Memory Map
1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
w1c
—
—
—
—
—
—
R
R
Enhanced Three-Speed Ethernet Controllers
2
0x0124_0106
0x0030_00F0
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8100_0000
0x0000_0000
0x0000_8000
0x0000_0000
Reset
—
—
—
—
—
—
16.5.3.1.1/16-21
16.5.3.1.2/16-22
16.5.3.1.3/16-22
16.5.3.1.4/16-26
16.5.3.1.5/16-28
16.5.3.1.6/16-30
16.5.3.1.7/16-31
16.5.3.1.8/16-32
16.5.3.1.9/16-33
16.5.3.2.1/16-34
16.5.3.2.2/16-36
16.5.3.2.3/16-40
16.5.3.2.4/16-41
16.5.3.2.5/16-42
16.5.3.2.6/16-42
Section/Page
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