MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 809

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.4.6.11 PCI Express Slot Capabilities Update Register (PEX_SLCAP_UPDATE)
The PCI Express slot capabilities update register shown in
Express slot capabilities register in the PCI Express configuration header (offset 0x60). It can be used
when the device is configured as an End Point to make the correct slot information available to the
upstream device. This register has to be programmed before setting the config-ready bit in the PCI Express
configuration ready register so that the host reads the correct information during enumeration.
Table 14-85
14.4.6.12 PCI Express Configuration Ready Register
The PCI Express configuration ready register, shown in
status to the transaction layer. The transaction layer handles configuration requests from external hosts
only after the CFG_READY bit is set. All the configuration requests received from external hosts before
the CFG_READY bit is set are completed with configuration request retry status (CRS). To ensure that the
Freescale Semiconductor
Offset 0x490
Reset 0
31–30
29–17
16–15
14–7
Bits
W
R
6
5
4
3
2
1
0
31 30 29
—
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
shows the PCI Express slot capabilities update register fields description.
Table 14-85. PCI Express Slot Capabilities Update Register Fields Description
Name
SPLS
SPLV
PSN
HPC
HPS
MRL
PCP
ABP
PIP
AIP
—
Figure 14-87. PCI Express Slot Capabilities Update Register
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Reserved
Physical Slot Number. Physical slot number attached to the port.
Slot Power Limit Scale. Specifies the scale used for the slot power limit value. The range of
values is as follows:
00 1.0x
01 0.1x
10 0.01x
11 0.001x
Slot power limit value. In combination with the slot power limit scale value, specifies the upper
limit on power supplied by slot. The power limit (in Watts) is calculated by multiplying the value
in this field by the value in the slot power limit scale field.
Hot plug capable
Hot plug surprise
Power indicator present
Attention indicator present
MRL sensor present
Power controller present
Attention button present
PSN
17 16 15 14
SPLS
0 0 0 0 0 1 1 1 1
Figure
Figure 14-87
SPLV
Description
14-88, indicates configuration complete
is used to set the values to the PCI
7
HPC HPS PIP AIP MRL PCP ABP
6
1
PCI Express Interface Controller
0
5
0
4
0
3
0
2
Access: R/W
0
1
14-71
0
0