MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 491

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 11-8
command CRC check enable, and response type bits.
11.4.5
The command response registers, shown in
card.
Freescale Semiconductor
Reset
Offset: 0x010 (CMDRSP0)
W
R
0x014 (CMDRSP1)
0x018 (CMDRSP2)
0x01C (CMDRSP3)
0
shows how the response type can be determined by the command index check enable,
Command Response 0–3 (CMDRSP0–3)
XFERTYP[RSPTYP]
Response Type
•
•
Table 11-8. Relation Between Parameters and Name of Response Type
In the SDIO Specification, response type notation of R5b is not defined.
R5 includes R5b in the SDIO Specification. But R5b is defined to
specify the eSDHC checks busy status after receiving a response. For
example, usually CMD52 is used as R5 but the I/O abort command
should be used as R5b.
The CRC field for R3 and R4 is expected to be all 1s. The CRC check
should be disabled for these response types.
00
01
10
10
11
Figure 11-7. Command Response 0–3 Register (CMDRSP n )
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Index Check Enable
XFERTYP[CICEN]
0
0
0
1
1
Figure
NOTE
11-7, store the four parts of the response bits from the
CMDRSP
All zeros
CRC Check Enable
XFERTYP[CCCEN]
0
1
0
1
1
Enhanced Secure Digital Host Controller
Response Type
No Response
R1, R5, R6
R1b, R5b
R3, R4
R2
Access: Read
11-11
31