MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 576

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DMA Controller (DMAC)
12.7
This section discusses the two methods to test for minor loop completion and explains active channel TCD
reads.
12.7.1
There are two methods to test for minor loop completion when using software initiated service requests.
The first method is to read the
from the sequence shown below. The second method is to test the
The minor loop complete condition is indicated by both bits reading zero after the
to a one. Polling the
channel execution is short in duration. The TCD status bits execute the following sequence for a software
activated channel:
The major loop complete status is explicitly indicated through the
The
12.7.2
While the channel is executing, if the
these fields are returned. The true values of
DMA engine is currently using in its internal register file (true values are not the values in the TCD local
memory for that channel).
The addresses (saddr and daddr) and nbytes (decrements to zero as the transfer progresses) can give an
indication of the progress of the transfer. All other values are read back from the TCD local memory.
12.7.3
Preemption is only available when fixed arbitration is selected for the channel arbitration modes. A
preempt-able situation is one in which a preempt-enabled channel is running and a higher priority request
becomes active. When the DMA engine is not operating in the fixed channel arbitration mode, the
determination of the relative priority of the actively running and the outstanding requests become
undefined. Channel priorities are treated as equal (or more exactly, constantly rotating) when round-robin
arbitration mode is selected.
The
channel is temporarily suspended while the preempting channel executes one iteration of the major loop.
Two
actively preempting a lower priority channel.
12-32
1.
2.
3.
4.
TCD.active
TCD.start
TCD.active
TCD.start
TCD.start
TCD.start
TCD.start
TCD Status
Minor Loop Complete
Active Channel TCD Reads
Preemption status
bit is cleared automatically when the channel begins execution.
bit for the preempted channel remains asserted throughout the preemption. The preempted
bits set at the same time in the overall TCD map indicates a higher priority channel is
= 1,
= 0,
= 0,
= 0,
TCD.active
TCD.active
TCD.active
TCD.active
TCD.active
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
TCD.citer
bit may be inconclusive because the active status may be missed if the
= 0,
= 0,
= 1,
= 0,
TCD.saddr
TCD.done
TCD.done
TCD.done
TCD.done
field and test for a change. Another method may be extracted
TCD.saddr
,
= 0 (channel has completed the minor loop and is idle) Or
= 0 (channel service request via software)
= 1 (channel has completed the major loop and is idle)
TCD.daddr
= 0 (channel is executing)
,
TCD.daddr
, and
TCD.nbytes
, and
TCD.start
TCD.done
TCD.nbytes
bit.
bit AND the
are read, the true values of
TCD.start
are the values that the
Freescale Semiconductor
TCD.active
was written
bit.