MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 488

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Secure Digital Host Controller
Table 11-5
11.4.4
The transfer type register, shown in
should set this register before issuing a command followed by a data transfer, or before issuing a resume
command. To prevent data loss, the eSDHC prevents a write to the bits that are involved in the data transfer
of this register while the data transfer is active.
The host driver should check PRSSTAT[CDIHB] and PRSSTAT[CIHB] before writing to this register.
Table 11-6
11-8
Offset: 0x00C (XFERTYP)
Reset
0–31
•
•
W
Bit
R
0–1
2–7
Bit
0 1
If PRSSTAT[CDIHB] is set, any attempt to send a command with data by writing to this register is
ignored.
If PRSSTAT[CIHB] is set, any write to this register is ignored.
—
CMDARG Command argument. The SD/MMC command argument is specified as bits 39–8 of the command
describes the CMDARG fields.
describes the XFERTYP fields.
2
Transfer Type Register (XFERTYP)
Name
CMDINX
CMDINX
Name
—
format in the SD or MMC Specification . If PRSSTAT[CMD] is set, this register is write-protected.
7
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
CMD
TYP
8
Reserved
Command index. These bits should be set to the command number (CMD0–63, ACMD0–63)
that is specified in bits 45–40 of the command format in the SD Memory Card Physical Layer
Specification and SDIO Card Specification .
9
SEL
Figure 11-6. Transfer Type Register (XFERTYP)
DP
10
Table 11-6. XFERTYP Field Descriptions
Table 11-5. CMDARG Field Descriptions
CICEN CCCEN —
11
Figure
12
11-6, controls the operation of data transfers. The host driver
13 14 15 16
RSP
TYP
All zeros
Description
Description
—
25
MSB
SEL
26
DTD
SEL
27
Freescale Semiconductor
—
28
Access: Read/Write
AC12
EN
29
BCEN
30
DMA
EN
31