MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 636

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface
specified in the queue head). Note that some of the field descriptions in
defined in the queue head. See
13-58
30–16
14–12
Bits
31
15
Total Bytes to
Transfer
C_Page
Name
ioc
dt
Data toggle. This is the data toggle sequence bit. The use of this bit depends on the setting of the
Data Toggle Control bit in the queue head.
Total bytes to transfer. This field specifies the total number of bytes to be moved with this transfer
descriptor. This field is decremented by the number of bytes actually moved during the transaction,
only on the successful completion of the transaction. The maximum value software may store in this
field is 5 × 4K (0x5000). This is the maximum number of bytes 5 page pointers can access. If the
value of this field is zero when the host controller fetches this transfer descriptor (and the active bit
is set), the host controller executes a zero-length transaction and retires the transfer descriptor. It is
not a requirement for OUT transfers that total bytes to transfer be an even multiple of QH[Maximum
Packet Length]. If software builds such a transfer descriptor for an OUT transfer, the last transaction
will always be less than QH[Maximum Packet Length]. Although it is possible to create a transfer up
to 20K this assumes the page is 0. When the offset cannot be predetermined, crossing past the 5th
page can be guaranteed by limiting the total bytes to 16K. Therefore, the maximum recommended
transfer is 16K (0x4000).
Interrupt on complete. If this bit is set, the host controller should issue an interrupt at the next
interrupt threshold when this qTD is completed.
Current rage. This field is used as an index into the qTD buffer pointer list. Valid values are in the
range 0x0 to 0x4. The host controller is not required to write this field back when the qTD is retired.
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Section 13.5.6, “Queue Head,”
Table 13-55. qTD Token (DWord 2)
Description
for more information on these fields.
Table 13-55
Freescale Semiconductor
reference fields are