MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 1039

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Once the user has determined the worst case scenario for their application, they program the required free
BD threshold into the eTSEC (through RQPRM[PBTHR]). Since different BD rings may have different
sizes and expected packet arrival rates, a separate threshold is provided for each active ring. It is
recommended that a threshold of at least four BDs is the practical minimum for gigabit Ethernet links.
For the Rx descriptor controller to determine the number of free BDs remaining in the ring, it needs to
know the following:
For each active ring, the current BD pointer (RBPTRn) is maintained by the eTSEC. Software knows both
the size of the Rx ring and the location of the last freed BD. By providing the eTSEC with those values
(through RQPRM[LEN] and RFBPTR respectively) the eTSEC always know how many receive buffers
are available to be consumed by incoming data.
The number of guaranteed free BDs in the ring is then determined by:
When RFBPTRn < RBPTRn
When RFBPTRn > RBPTRn
When RBPTRn = RFBPTRn the number of free BDs in the ring is either one (since RFBPTRn points to a
free BD) or equal to the ring length. Since the BD pointed to by RBPTRn may be either in use or about to
be used, it is not considered in the free BD count. To resolve the case where the two pointers collide, the
following logic applies:
If RBASEn was updated and thus initializes both RBPTRn and RFBPTRn, the ring is deemed empty.
If RFBPTRn is updated by a software write and matches RBPTRn, the ring is deemed empty.
If the hardware updates RBPTRn and the result matches RFBPTRn, the ring is deemed to have one BD
remaining. Upon writing this BD back to memory (indicating the buffer is occupied) the ring is deemed to
be full.
Important. There is a possibility that if software is severely backlogged in updating RFBPTRn, the
hardware could wrap around the ring entirely, consume exactly the remaining number of BDs and not halt
with a BSY error. If software then increments RFBPTRn to the next address (thereby equalling RBPTRn),
the hardware assumes the ring is now empty (when in fact there is only a single BD freed up). This results
in the hardware failing to maintain back pressure on the far end. Upon software incrementing RFBPTRn
Freescale Semiconductor
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1. The location of the current BD being used by hardware
2. The location of the last BD that was released (freed) by software
3. The length of the Rx BD ring.
The eTSEC has just started transmitting a large frame and thus cannot send out a pause frame
Upon reception of the pause request the far-end has just started transmission of a large frame
The eTSEC receives a burst of short frames with minimum inter-frame-gap (96-bit times for
Ethernet)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
FreeBDs
FreeBDs
=
RQPRMn LEN
=
RFBPTRn RBPTRn
[
]
–
RBPTRn
–
+
RFBPTRn
Enhanced Three-Speed Ethernet Controllers
16-155