MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 850
MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PCI Express Interface Controller
14.6.1.1
The device includes four general purpose inbound and outbound address translation windows which are
used to map between the PCI Express domain and the CSB domain (referred as local address space). The
outbound windows are common for both Root Complex and End Point modes, and their configuration
registers reside in the CSB bridge space. For inbound windows there is a different set of configuration
registers between Root Complex and End Point modes. EP inbound base address registers (BARs) reside
in the standard configuration header space of the PCI Express core, while RC inbound base address
registers (BARs) reside in the CSB bridge space. Because the CSB domain supports only 32 bit addressing,
outbound base address registers and inbound translation registers are 32 bit only.
the available combinations between base address registers and translation address registers.
14-112
Window
Number
•
•
•
0
1
2
3
0
1
2
3
0
Section 14.6.1.8, “I/O Space Addressing”
Section 14.6.1.9, “Configuration Space Access”
Section 14.6.1.10, “Inbound Messages”
64-bit address, low portion
64-bit address, high portion
64-bit address, low portion
64-bit address, high portion
64-bit address, low portion
64-bit address, high portion
64-bit address, low portion
64-bit address, high portion
32-bit address
32-bit address
64-bit address, low portion
64-bit address, high portion
64-bit address, low portion
64-bit address, high portion
64-bit address, low portion
64-bit address, high portion
Address Translation Windows (ATMUs)
Outbound Windows—Common for Root Complex and End Point Modes
Type
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Table 14-136. Address Translation Window Combinations
Inbound Windows—Root Complex Mode
Inbound Windows—End Point Mode
PEX_OWBAR0
PEX_OWBAR1
PEX_OWBAR2
PEX_OWBAR3
PEX_RCIWBARL0
PEX_RCIWBARH0
BAR Name
BAR0
BAR1
BAR2
BAR3
BAR4
BAR5
BAR Address
0x9CA4
0x9CB4
0x9CC4
0x9CD4
0x9E6C
0x9E68
0x01C
0x010
0x014
0x018
0x020
0x024
PEX_OWTARL0
PEX_OWTARH0
PEX_OWTARL1
PEX_OWTARH1
PEX_OWTARL2
PEX_OWTARH2
PEX_OWTARL3
PEX_OWTARH3
PEX_EPIWTAR0
PEX_EPIWTAR1
PEX_EPIWTAR2
PEX_EPIWTAR3
PEX_RCIWTAR0
TAR Name
Table 14-136
Freescale Semiconductor
TAR Address
0x9CAC
0x9CBC
0x9CCC
0x9CDC
0x9CA8
0x9CB8
0x9CC8
0x9CD8
0x9E64
0xDEC
0xDE0
0xDE4
0xDE8
specifies
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