MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 46

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table
Number
13-48
13-49
13-50
13-51
13-52
13-53
13-54
13-55
13-56
13-57
13-58
13-59
13-60
13-61
13-62
13-63
13-64
13-65
13-66
13-67
13-68
13-69
13-70
13-71
13-72
13-73
13-74
13-75
13-76
13-77
13-78
13-79
13-80
13-81
13-82
13-83
13-84
13-85
13-86
13-87
13-88
xlvi
Microframe Schedule Control............................................................................................. 13-53
siTD Transfer Status and Control........................................................................................ 13-54
siTD Buffer Pointer Page 0 (Plus) ...................................................................................... 13-55
siTD Buffer Pointer Page 1 (Plus) ...................................................................................... 13-55
siTD Back Link Pointer ...................................................................................................... 13-55
qTD Next Element Transfer Pointer (DWord 0) ................................................................. 13-57
qTD Alternate Next Element Transfer Pointer (DWord 1) ................................................. 13-57
qTD Token (DWord 2) ........................................................................................................ 13-58
qTD Buffer Pointer ............................................................................................................. 13-61
Queue Head DWord 0 ......................................................................................................... 13-62
Endpoint Characteristics: Queue Head DWord 1................................................................ 13-63
Endpoint Capabilities: Queue Head DWord 2 .................................................................... 13-64
Current qTD Link Pointer ................................................................................................... 13-65
Host-Controller Rules for Bits in Overlay (DWords 5, 6, 8, and 9) ................................... 13-66
FTSN Normal Path Pointer ................................................................................................. 13-67
FSTN Back Path Link Pointer ............................................................................................ 13-67
Behavior During Wake-Up Events...................................................................................... 13-71
Operation of FRINDEX and SOFV (SOF Value Register)................................................. 13-75
Example Periodic Reference Patterns for Interrupt Transfers ............................................ 13-88
Ping Control State Transition Table .................................................................................... 13-89
Interrupt IN/OUT Do Complete Split State Execution Criteria........................................ 13-103
Initial Conditions for OUT siTD TP and T-Count Fields ................................................. 13-112
Transaction Position (TP)/Transaction Count (T-Count) Transition Table ....................... 13-112
Summary siTD Split Transaction State............................................................................. 13-116
Example Case 2a—Software Scheduling siTDs for an IN Endpoint................................ 13-117
Summary of Transaction Errors ........................................................................................ 13-120
Summary Behavior on Host System Errors ...................................................................... 13-123
Endpoint Capabilities/Characteristics ............................................................................... 13-125
Current dTD Pointer.......................................................................................................... 13-126
Multiple Mode Control ..................................................................................................... 13-127
Next dTD Pointer .............................................................................................................. 13-127
dTD Token ........................................................................................................................ 13-128
Buffer Pointer Page 0 ........................................................................................................ 13-128
Buffer Pointer Page 1 ........................................................................................................ 13-129
Buffer Pointer Pages 2–4 .................................................................................................. 13-129
Device Controller State Information Bits ......................................................................... 13-131
Device Controller Endpoint Initialization......................................................................... 13-134
Device Controller Stall Response Matrix ......................................................................... 13-135
Variable Length Transfer Protocol Example (ZLT = 0) .................................................... 13-137
Variable Length Transfer Protocol Example (ZLT = 1) .................................................... 13-137
Interrupt/Bulk Endpoint Bus Response Matrix................................................................. 13-138
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Tables
Title
Freescale Semiconductor
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