MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 357

MPU POWERQUICC II PRO 473MAPBGA

MPC8308VMAGD

Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC8308VMAGD

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 9-31
Figure 9-32
Figure 9-33
four 8M × 8 DDR modules for a total of 64 Mbytes of system memory. One of the nine modules is used
for the memory’s ECC checking function. Certain address and control lines may require buffering.
Analysis of the device’s AC timing specifications, desired memory operating frequency, capacitive loads,
Freescale Semiconductor
shows an example DDR SDRAM configuration with four logical banks.
shows some typical signal connections.
shows an example DDR SDRAM configuration with two physical banks each comprised of
MCS, MRAS, MCAS, MWE
Figure 9-31. Typical Dual Data Rate SDRAM Internal Organization
BANK ADDR
CKE, MCK, MCK
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
COMMAND:
MRAS
MCAS
ADDR
‘SUB’
MWE
MCS
MCK
MCK
Figure 9-32. Typical DDR SDRAM Interface Signals
CKE
BA1,BA0
DM
ADDR
DQM
13
2
SDRAM
Control
A[12:0]
BA[1:0]
Write Enable
64M x 1 Byte
Command
Bus
CK
512 Mbit
Data-Out Registers
Logical
Bank 0
DQ[7:0]
DQS
Logical
Bank 1
Read Data Latch
MUX, MASK,
Data Bus
8
Logical
Bank 2
Data-In Registers
DATA
DATA
STROBE
Logical
Bank 3
DDR Memory Controller
9-39

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