MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 138

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Address 0x0_0A00
Reset
Reset, Clocking, and Initialization
4.5.2.1
SPMR is shown in
the reset configuration word low loaded during the reset flow. Note that this register is updated only during
a power-on reset sequence and not by a hard reset sequence. It may hold values different than those in the
RCWLR after a hard reset sequence.
Table 4-31
4-30
Reset
16–31
See
9–15
0x0_0A0C–
Bits
2–3
4–7
0x0_0AFC
0x0_0A08
Address
0
1
8
W
W
R LBIUCM DDRCM
R
1
Table 4-31
COREPLL
16
0
n
n
LBIUCM
DDRCM
SPMF
Name
defines the system PLL mode register bit fields.
—
—
—
System PLL Mode Register (SPMR)
System clock control register (SCCR)
Reserved, should be cleared
for reset values.
n
n
1
Figure
Table 4-30. Clock Configuration Registers Memory Map (continued)
Local bus memory controller clock mode
DDR SDRAM memory controller clock mode
Reserved, should be cleared
System PLL multiplication factor
Reserved
Core PLL configuration
Reserved, should be cleared
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
n
n
2
4-13. It obtains its values according to the reset configuration input signal and
—
Table 4-31. System PLL Mode Register Bit Settings
n
n
3
Figure 4-13. System PLL Mode Register
Register
n
n
4
Meaning
n
n
SPMF
n
n
n
n
7
—
—
n
n
8
Access
R/W
Section 4.3.2.1, “Reset Configuration Word Low
Register (RCWLR)”
Section 4.3.2.1, “Reset Configuration Word Low
Register (RCWLR)”
Section 4.3.2.1.2, “System PLL Configuration”
For more information, see PowerQUICC II Pro
MPC8308 Hardware Specification.
n
n
—
9
n
n
0x5550_0010
Reset
n
n
—
Description
COREPLL
—
—
—
Freescale Semiconductor
n
n
Access: Read only
n
n
Section/Page
4.5.2.3/4-32
—
n
n
15
31
n
n