MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 724

MPU POWERQUICC II PRO 473MAPBGA

MPC8308VMAGD

Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC8308VMAGD

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Universal Serial Bus Interface
Allocate 8-DWord dTD block of memory aligned to 8-DWord boundaries. Example: bit address 4–0 would
be equal to ‘00000’.
Write the following fields:
13.8.5.3
To safely add a dTD, the DCD must account for the event in which the device controller reaches the end
of the dTD list at the same time a new dTD is being added to the end of the list.
First, determine whether the link list is empty by checking the DCD driver to see if the pipe is empty
(internal representation of linked-list should indicate if any packets are outstanding). Then follow the
sequence of actions in the following list as appropriate, depending on whether the link list is empty or not
empty.
13.8.5.4
After a dTD has been initialized and the associated endpoint primed the device controller will execute the
transfer upon the host-initiated request. The DCD is notified with a USB interrupt if the Interrupt On
13-146
1. Initialize first seven DWords to ‘0’.
2. Set the terminate bit to ‘1’.
3. Fill in total bytes with transfer size.
4. Set the interrupt on complete if desired.
5. Initialize the status field with the active bit set to ‘1’ and all remaining status bits set to ‘0’.
6. Fill in buffer pointer page 0 and the current offset to point to the start of the data buffer.
7. Initialize buffer pointer page 1 through page 4 to be one greater than each of the previous buffer
pointer.
Link list is empty
a) Write dQH next pointer AND dQH terminate bit to ‘0’ as a single DWord operation.
b) Clear active and halt bit in dQH (in case set from a previous error).
c) Prime endpoint by writing ‘1’ to correct bit position in ENDPTPRIME.
Link list is not empty
a) Add dTD to end of linked list.
b) Read correct prime bit in ENDPTPRIME—if ‘1’ DONE.
c) Set ATDTW bit in USBCMD register to ‘1’.
d) Read correct status bit in ENDPTSTATUS. (store in tmp. variable for later).
e) Read ATDTW bit in USBCMD register.
f) Write ATDTW bit in USBCMD register to ‘0’.
g) If status bit read in (3) is ‘1’ DONE.
h) If status bit read in (3) is ‘0’ then Goto Case 1: Step 1.
If ‘0’ goto 3.
If ‘1’ continue to 6.
Executing a Transfer Descriptor
Transfer Completion
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Freescale Semiconductor

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