MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 1047

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The contents of the Tx FCB are defined in
Freescale Semiconductor
Bytes
0–1
0–1
2–3
8–14
8–15
Bits
0–7
15
0
1
2
3
4
5
6
7
Name
L4OS
L3OS
TUP
UDP
CTU
NPH
VLN
PTP
CIP
IP6
—
IP
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Table 16-146. Tx Frame Control Block Description
VLAN control word valid. This bit is ignored when the PTP bit is set. VLAN tag is read from
the DFVLAN register if PTP=1.
0 Ignore VLCTL field.
1 If VLAN tag insertion is enabled for eTSEC, use the VLCTL field as the VLAN control
Layer 3 header is an IP header.
0 Ignore layer 3 and higher headers.
1 Assume that the layer 3 header is an IPv4 or IPv6 header, and take L3OS field as valid.
IP header is IP version 6. Valid only if IP = 1.
0 IP header version is 4.
1 IP header version is 6.
Layer 4 header is a TCP or UDP header.
0 Do not process any layer 4 header.
1 Assume that the layer 4 header is either TCP or UDP (see UDP bit), and offload
UDP protocol at layer 4.
0 Layer 4 protocol is either TCP (if TUP = 1) or undefined.
1 Layer 4 protocol is UDP if TUP = 1.
Checksum IP header enable.
0 Do not generate an IP header checksum.
1 Generate an IPv4 header checksum.
Checksum TCP or UDP header enable.
0 Do not generate a TCP or UDP header checksum. RFC 768 advises that UDP packets
1 Generate a TCP header checksum if IP = 1 and TUP = 1 and UDP = 0.
Disable calculation of TCP or UDP pseudo-header checksum. This bit should be set if IP
options need to be consulted in forming the pseudo-header checksum, as eTSEC does not
examine IP options or extension headers for TCP/IP offload on transmit.
0 Calculate TCP or UDP pseudo-header checksum as normal, assuming that the IP header
1 Do not calculate a TCP or UDP pseudo-header checksum, but instead use the value in
Reserved
Indication to the transmitter that this is a PTP packet. Enabling PTP disables per packet
VLAN tag insertion. Instead, VLAN tag will be read from the DFVLAN when the PTP field is
true.
0 Do not attempt to capture transmission event time
1 Valid PTP_ID field. When this packet is transmitted, capture the time of transmission.
Must be clear if TMR_CTRL[TE] is clear.
Layer 4 header offset from start of layer 3 header. The layer 4 header starts L4OS octets
after the layer 3 header if it is present. The maximum layer 3 header length supported is thus
255 bytes, which may prevent TCP/IP offload on particularly large IPv6 headers.
Layer 3 header offset from start of frame not including the 8 bytes for this FCB. The layer 3
header starts L3OS octets from the start of the frame including any custom preamble header
that may be present. The maximum layer 2 header length supported is thus 255 bytes.
word.
checksumming on the basis that the IP header has no extension headers.
not requiring checksum validation should have their checksum field set to zero.
has no options.
field PHCS when determining the overall TCP or UDP checksum.
Table
16-146.
Description
Enhanced Three-Speed Ethernet Controllers
16-163