MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 762

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PCI Express Interface Controller
14.4.2.2
The PCI Express subsystem vendor ID register, shown in
Table 14-16
14.4.2.3
The PCI Express subsystem ID register, shown in
Table 14-17
14-24
Offset 0x02E (EP mode only)
Reset
Offset 0x02C (EP mode only)
Reset
15–0
15–0
Bits
Bits
W
W
R
R
Subsystem ID Subsystem ID. The value of this register can be set by programming the SSID field of the PCI Express
Subsystem
15
15
Vendor ID
Name
Name
describes the PCI Express subsystem vendor ID register.
describes the PCI Express subsystem ID register.
PCI Express Subsystem Vendor ID Register (EP Mode Only)
PCI Express Subsystem ID Register (EP Mode Only)
Table 14-16. PCI Express Subsystem Vendor ID Register Fields Description
Table 14-17. PCI Express Subsystem ID Register Fields Description
Subsystem Vendor ID. The value of this register can be set by programming the SSVID field of the PCI
Express Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE). See
Express Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE).”
This value has to be programmed before setting the config-ready bit in the PCI Express Configuration
Ready Register so that the host reads the correct information during enumeration.
Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE). See
Subsystem Vendor ID Update Register
This value has to be programmed before setting the config-ready bit in the PCI Express Configuration
Ready Register so that the host reads the correct information during enumeration.
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Figure 14-16. PCI Express Subsystem Vendor ID Register
Figure 14-17. PCI Express Subsystem ID Register
Subsystem Vendor ID
Subsystem ID
Figure
All zeros
All zeros
(PEX_SSVID_UPDATE).
Description
14-17, identifies the subsystem.
Figure
Description
14-16, identifies the subsystem.
Section 14.4.6.8, “PCI Express
Freescale Semiconductor
Section 14.4.6.8, “PCI
Access: Read-only
Access: Read-only
0
0