MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 32

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure
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14-143
14-144
15-1
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15-7
16-1
16-2
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16-4
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16-12
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16-22
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16-27
16-28
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16-30
16-31
16-32
xxxii
n-Way Chain Descriptor Organization in Host Memory .................................................. 14-131
Block Descriptor Organization in Host Memory .............................................................. 14-132
SerDes PHY Block Diagram................................................................................................. 15-1
SerDes Control Register 0 (SRDSCR0)................................................................................ 15-4
SerDesn Control Register 1 (SRDSnCR1)............................................................................ 15-6
SerDes Control Register 2 (SRDSCR2)................................................................................ 15-7
SerDes Control Register 3 (SRDSCR3)................................................................................ 15-8
SerDes Control Register 4 (SRDSCR4)................................................................................ 15-9
SerDes Reset Control Register (SRDSRSTCTL) ............................................................... 15-10
eTSEC Block Diagram.......................................................................................................... 16-2
TSEC_ID Register .............................................................................................................. 16-21
TSEC_ID2 Register ............................................................................................................ 16-22
IEVENT Register Definition .............................................................................................. 16-23
IMASK Register Definition ................................................................................................ 16-27
EDIS Register Definition .................................................................................................... 16-28
ECNTRL Register Definition ............................................................................................. 16-30
PTV Register Definition...................................................................................................... 16-32
DMACTRL Register........................................................................................................... 16-32
TBIPA Register Definition.................................................................................................. 16-34
TCTRL Register Definition ................................................................................................ 16-34
TSTAT Register Definition ................................................................................................. 16-36
DFVLAN Register Definition............................................................................................. 16-40
TXIC Register Definition.................................................................................................... 16-41
TQUEUE Register Definition ............................................................................................. 16-42
TR03WT Register Definition.............................................................................................. 16-43
TR47WT Register Definition.............................................................................................. 16-43
TBPTR0–TBPTR7 Register Definition .............................................................................. 16-44
TBASE Register Definition ................................................................................................ 16-45
TMR_TXTSn_ID Register Definition ................................................................................ 16-45
TMR_TXTSn_H/L Register Definition.............................................................................. 16-46
RCTRL Register Definition ................................................................................................ 16-46
RSTAT Register Definition ................................................................................................. 16-49
RXIC Register Definition ................................................................................................... 16-50
RQUEUE Register Definition............................................................................................. 16-51
RBIFX Register Definition ................................................................................................. 16-52
Receive Queue Filer Table Address Register Definition .................................................... 16-54
Receive Queue Filer Table Control Register Definition ..................................................... 16-54
Receive Queue Filer Table Property IDs 0, 2–15 Register Definition................................ 16-55
Receive Queue Filer Table Property ID1 Register Definition ............................................ 16-56
MRBLR Register Definition ............................................................................................... 16-59
RBPTR0–RBPTR7 Register Definition .............................................................................. 16-60
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
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