MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 36

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure
Number
18-10
18-11
18-12
18-13
18-14
18-15
19-1
19-2
19-3
19-4
19-5
19-6
19-7
19-8
19-9
19-10
19-11
19-12
19-13
19-14
19-15
20-1
21-1
21-2
21-3
21-4
21-5
21-6
21-7
xxxvi
Modem Control Register (UMCR1 and UMCR2).............................................................. 18-12
Line Status Register (ULSR1 and ULSR2) ........................................................................ 18-13
Scratch Register (USCR) .................................................................................................... 18-14
Alternate Function Register (UAFR) .................................................................................. 18-14
DMA Status Register (UDSR) ............................................................................................ 18-15
UART Bus Interface Transaction Protocol Example .......................................................... 18-17
SPI Block Diagram ............................................................................................................... 19-1
Single-Master/Multi-Slave Configuration ............................................................................ 19-3
Multiple-Master Configuration ............................................................................................. 19-5
SPMODE-SPI Mode Register Definition ............................................................................. 19-8
SPI Transfer Format with SPMODE[CP] = 0..................................................................... 19-10
SPI Transfer Format with SPMODE[CP] = 1..................................................................... 19-10
SPIE—SPI Event Register Definition................................................................................. 19-11
SPIM—SPI Mask Register Definition ................................................................................ 19-12
SPI Command Register Definition ..................................................................................... 19-13
SPI Transmit Data Hold Register Definition ...................................................................... 19-13
SPI Receive Data Hold Register Definition........................................................................ 19-14
Example SPMODE[REV] = 0 SPMODE[LEN] = 7 LSB Sent First.................................. 19-14
Example SPMODE[REV] = 1 SPMODE[LEN] = 7 MSB Sent First................................. 19-14
Example SPMODE[REV] = 1 SPMODE[LEN] = 15 MSB Sent First............................... 19-14
Example SPMODE[REV] = 0 SPMODE[LEN] = 15 LSB Sent First................................ 19-15
JTAG Interface Block Diagram ............................................................................................ 20-1
GPIO Module Block Diagram .............................................................................................. 21-1
GPIO Direction Register (GPDIR) ....................................................................................... 21-3
GPIO Open Drain Register (GPODR) .................................................................................. 21-3
GPIO Data Register (GPDAT) .............................................................................................. 21-4
GPIO Interrupt Event Register (GPIER) .............................................................................. 21-4
GPIO Interrupt Mask Register (GPIMR).............................................................................. 21-5
GPIO Interrupt Control Register (GPICR) ........................................................................... 21-5
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
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Freescale Semiconductor
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