MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 607
MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits
4
3
2
1
0
Name
OCA
PEC
CSC
CCS
PE
Over-current active. This bit will automatically transition from one to zero when the over current condition is
removed.
Host/OTG mode:
Device mode:
1 Port currently in over-current condition.
0 Port not in over-current condition.
For the root hub, this bit gets set only when a port is disabled due to disconnect on the port or due to the
appropriate conditions existing at the EOF2 point (See Chapter 11 of the USB Specification). Software clears
this by writing a one to it.[
In device mode:
1 Port disabled.
0 No change.
This field is zero if Port Power(PP) is zero.
Port enabled/disabled.
Host mode:
Device mode:
Connect change status.
Host mode:
1 Connect Status has changed.
0 No change.
Device mode:
Host mode:
1 Device is present
0 No device present.
This field is zero if Port Power(PP) is zero in host mode.
In device mode:
1 Attached
0 Not attached.
A one indicates that the device successfully attached and is operating in either high-speed or full-speed as
indicated by the High Speed Port bit in this register. A zero indicates that the device did not attach successfully
or was forcibly disconnected by the software writing a zero to USBCMD[RS] (run bit). It does not state the
device being disconnected or suspended.
Port enable/disable change.
Current connect status.
• The user can provide over-current detection to the USB n _PWRFAULT signal for this condition.
• This bit must always be 0.
• The device port is always enabled. (This bit is zero.)
• Ports can only be enabled by the controller as a part of the reset and enable. Software cannot enable a port
• When the port is disabled, (0) downstream propagation of data is blocked except for reset.
• This field is zero if Port Power(PP) is zero in host mode.
• The device port is always enabled. (This bit is one.)
• This bit indicates a change has occurred in the port’s Current Connect Status. the controller sets this bit for
• This field is zero if Port Power(PP) is zero.
• This bit is undefined.
by writing a one to this field. Ports can be disabled by either a fault condition (disconnect event or other fault
condition) or by the host software. Note that the bit status does not change until the port state actually
changes. There may be a delay in disabling or enabling a port due to other host and bus events.
all changes to the port device connect status, even if system software has not cleared an existing connect
status change. For example, the insertion status changes twice before system software has cleared the
changed condition, hub hardware is ‘setting’ an already-set bit (i.e., the bit will remain set). Software clears
this bit by writing a one to it.
Table 13-23. PORTSC Register Field Descriptions (continued)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Description
Universal Serial Bus Interface
13-29
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