MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 532

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Secure Digital Host Controller
For simplicity, the software flow described below incorporates the internal DMA, and the write operation
is a multi-block write with Auto CMD12 enabled. For the other method (CPU polling status) and different
transfer nature, the internal DMA part of the procedure should be removed and alternative steps inserted.
11.6.3.1.2
The write operation can be paused during the transfer. Instead of stopping the SD_CLK at any time to
pause all the operations which is also inaccessible to the host driver, the driver can set
PROCTL[SABGREQ] to pause the transfer between the data blocks. Since there is no timeout condition
in a write operation during the data blocks, a write operation to the cards can be paused in this way and if
line SD_DAT0 is not required to de-assert to release busy state, no suspend command is needed.
Similar to the flow described in
the same type of write operations:
11-52
1. Check the card status and wait until the card is ready for data.
2. Set the card block length.
3. Set eSDHC BLKATTR[BLKSIZE] to the same as the block length set in the card in step 2.
4. Set eSDHC BLKATTR[BLKCNT] with the number of blocks to send.
5. Disable the buffer write ready interrupt, configure the DMA setting, and enable the eSDHC DMA
6. Wait for the transfer complete interrupt.
7. Check the status bit to see if a read CRC error or any other errors occurred between sending Auto
1. Check the card status and wait until card is ready for data.
2. Set the card block length.
3. Set the eSDHC BLKATTR[BLKSIZE] to the same as the block length set in the card in step 2.
4. Set eSDHC BLKATTR[BLKCNT] with the number of blocks to send.
5. Disable the buffer write ready interrupt, configure the DMA setting, and enable the eSDHC DMA
6. Set PROCTL[SABGREQ].
7. Wait for the transfer complete interrupt.
8. Clear PROCTL[SABGREQ].
9. Check the status bit to see if a write CRC error occurred.
10. Set PROCTL[CREQ] to continue the read operation.
11. Wait for the transfer complete interrupt.
— MMC/SD cards — use SET_BLOCKLEN (CMD16)
— SDIO cards or the I/O portion of SD Combo cards — IO_RW_DIRECT (CMD52) to set I/O
when sending the command with data transfer. Set XFERTYP[AC12EN].
CMD12 and receiving the response.
— MMC/SD cards — use SET_BLOCKLEN (CMD16)
— SDIO cards or the I/O portion of SD Combo cards — use IO_RW_DIRECT (CMD52) to set
when sending the command with data transfer. Set XFERTYP[AC12EN].
block size bit field in the CCCR register (for function 0) or FBR (for functions 1–7)
the I/O block size bit field in CCCR register (for function 0) or FBR (for functions 1–7)
Write with Pause
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Section 11.6.3.1.1, “Normal Write,”
the write with pause is shown with
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