MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 801

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.4.6.2
The PCI Express N_FTS Control Register, shown in
advertised by the PCI Express controller during link training. It is preferable to set it before the PCI
Express core internal reset is negated. If this value is changed after the link is up, the new value will take
effect during the next link training. The N_FTS value is should be set according to the L0s exit latency of
Freescale Semiconductor
Status Code
(Hex)
1A
1B
1C
1D
1E
0F
10
11
12
13
14
15
16
17
18
19
1F
20
21
22
23
24
25
26
PCI Express N_FTS Control Register (PEX_NFTS_CTRL)
Configuration lane number wait (2)
Configuration lane number wait (3)
Configuration lane number accept
Configuration complete (0)
Configuration complete (1)
Configuration idle (0)
Configuration idle (1)
L0
TX L0; RX L0s entry
TX L0; RX L0s idle
TX L0; RX L0s fast training sequence (FTS)
TX L0s entry (0); RX L0
TX L0s entry (0); RX L0s idle
TX L0s entry (0); RX L0s FTS
TX L0s entry (1); RX L0
TX L0s entry (1); RX L0s idle
TX L0s entry (1); RX L0s FTS
TX L0s idle; RX L0
TX L0s idle; RX L0s entry
TX L0s idle; RX L0s idle
TX L0s idle; RX L0s FTS
TX L0s FTS; RX L0
TX L0s FTS; RX L0s entry
TX L0s FTS; RX L0s idle
LTSSM State Description
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Table 14-75. PEX_LTSSM_STAT Status Codes (continued)
Figure
Status Code
(Hex)
4C
3A
4A
4B
6A
6B
36
37
38
39
3F
7F
49
60
61
62
68
69
75
71
72
73
74
78
14-78, is used to set the N_FTS value that is
Recovery cfg (1)
Recovery idle (0)
Recovery idle (1)
Recovery to configuration
Recovery cfg to configuration
L0 no training
Detect quiet EI
Configuration link width start—RC
Configuration link width accept—RC
Configuration lane number wait—RC
Configuration lane number accept—RC
Loopback slave active (0)
Loopback slave active (1)
Loopback slave exit
Hot reset (0)
Hot reset (1)
Hot reset (0)—RC
Hot reset (1)—RC
Disabled (0)
Disabled (1)
Disabled (2)
Disabled (3)
Disabled (4)
L0 to L1/L2—RC
LTSSM State Description
PCI Express Interface Controller
14-63