MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 763
MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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14.4.2.4
The PCI Express capabilities pointer register, shown in
supported by the device.
Table 14-18
14.4.2.5
The PCI Express interrupt line register, shown in
to communicate interrupt line routing information. Values in this register are programmed by system
software and are system-specific.
Table 14-19
Freescale Semiconductor
Offset 0x034
Reset
Offset 0x03C (EP mode only)
Reset
Bits
Bits
7–0
7–0
W
W
R
R
Capabilities
Interrupt Line Communicates interrupt line routing information.
Pointer
Name
7
0
Name
7
describes the PCI Express capabilities pointer.
describes the PCI Express interrupt line register.
PCI Express Capabilities Pointer Register
PCI Express Interrupt Line Register (EP-Mode Only)
Table 14-18. PCI Express Capabilities Pointer Register Fields Description
Table 14-19. PCI Express Interrupt Line Register Fields Description
The capabilities pointer provides the offset (0x44) for additional PCI Express-compatible registers above
the common 64-byte header. Refer to
Configuration Space Registers.”
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
1
Figure 14-18. PCI Express Capabilities Pointer Register
Figure 14-19. PCI Express Interrupt Line Register
0
Capabilities Pointer
0
Figure
Interrupt Line
Section 14.4.4, “PCI Express-Compatible Device-Specific
All zeros
Figure
14-19, is used by device drivers and OS software
Description
Description
0
14-18, identifies additional functionality
1
PCI Express Interface Controller
0
Access: Read/Write
Access: Read-only
0
0
0
14-25
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