MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 9

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Paragraph
Number
10.1
10.1.1
10.1.2
10.1.3
10.2
10.3
10.3.1
10.4
10.4.1
10.4.2
10.4.3
10.4.4
10.5
10.5.1
10.5.2
10.5.3
10.5.4
10.5.5
11.1
11.2
11.2.1
11.3
11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.4.6
11.4.7
11.4.8
11.4.9
11.4.10
11.4.11
11.4.12
11.4.13
11.4.14
Freescale Semiconductor
Introduction.................................................................................................................... 10-1
External Signal Descriptions ......................................................................................... 10-4
Memory Map/Register Definition ................................................................................. 10-7
Functional Description................................................................................................. 10-39
Initialization/Application Information ......................................................................... 10-82
Overview........................................................................................................................ 11-1
Features .......................................................................................................................... 11-2
External Signal Description ........................................................................................... 11-3
Memory Map/Register Definition ................................................................................. 11-4
Overview.................................................................................................................... 10-2
Features...................................................................................................................... 10-2
Modes of Operation ................................................................................................... 10-3
Register Descriptions................................................................................................. 10-8
Basic Architecture.................................................................................................... 10-40
General-Purpose Chip-Select Machine (GPCM)..................................................... 10-42
Flash Control Machine (FCM) ................................................................................ 10-53
User-Programmable Machines (UPMs)................................................................... 10-68
Interfacing to Peripherals in Different Address Modes ........................................... 10-82
Interface to Different Port-Size Devices.................................................................. 10-83
Command Sequence Examples for NAND Flash EEPROM................................... 10-84
Interfacing to Fast-Page Mode DRAM Using UPM ............................................... 10-88
Interfacing to ZBT SRAM Using UPM................................................................... 10-98
Data Transfer Modes.................................................................................................. 11-3
DMA System Address Register (DSADDR)............................................................. 11-6
Block Attributes Register (BLKATTR)..................................................................... 11-6
Command Argument Register (CMDARG) .............................................................. 11-7
Transfer Type Register (XFERTYP).......................................................................... 11-8
Command Response 0–3 (CMDRSP0–3).................................................................11-11
Buffer Data Port Register (DATPORT) ................................................................... 11-13
Present State Register (PRSSTAT) .......................................................................... 11-13
Protocol Control Register (PROCTL) ..................................................................... 11-17
System Control Register (SYSCTL)........................................................................ 11-20
Interrupt Status Enable Register (IRQSTATEN) ..................................................... 11-27
Interrupt Signal Enable Register (IRQSIGEN) ....................................................... 11-30
Host Controller Capabilities (HOSTCAPBLT) ....................................................... 11-34
Interrupt Status Register (IRQSTAT)....................................................................... 11-23
Auto CMD12 Error Status Register (AUTOC12ERR)............................................ 11-32
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Enhanced Secure Digital Host Controller
Contents
Chapter 11
Title
Number
Page
ix