MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 152

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System Configuration
Table 5-11
5.1.4.6
The PCI Express 1 local access window attributes register is shown in
Table 5-12
5-10
20–31
26–31
0–19
1–25
‘
‘
Bits
Bits
Offset 0x84
Reset
0
W
R
BASE_ADDR Identifies the 20 most-significant address bits of the base of local access window. The specified base
Name
EN
SIZE
0
EN
Figure 5-7. PCI Express 1 Local Access Window Attributes Register (PCIEXP1LAWAR)
—
defines the bit fields of PCIEXP1LAWBAR.
defines the bit fields of PCIEXP1LAWAR.
Name
—
PCI Express Local Access Window Attributes Registers
(PCIEXP1LAWAR)
0 The PCI Express 1 local access window is disabled.
1 The PCI Express 1 local access window is enabled and other PCIEXP1LAWAR fields combine to identify
Reserved. Write has no effect, read returns 0.
Identifies the size of the window from the starting address. Window size is 2
000000–001010 Reserved. Window is undefined.
001011 4 Kbytes
001100 8 Kbytes
001101 16 Kbytes
. . . . . . . 2
011110 2 Gbytes
011111–111111 Reserved. Window is undefined.
an address range for this window.
address should be aligned to the window size, as defined by PCIEXP1LAWAR[SIZE].
Reserved. Write has no effect, read returns 0.
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
(SIZE+1)
bytes
Table 5-11. PCIEXP1LAWBAR Bit Settings
Table 5-12. PCIEXP1LAWAR Bit Settings
—
All zeros
Description
Description
Figure
5-7.
(SIZE+1)
Freescale Semiconductor
bytes.
25 26
Access: Read/Write
SIZE
31