MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 1165

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
eTSEC1
0xC20–
0x8A0–
0xB00–
0xAFC
0xBFC
0xC0C
0xC1C
0xC4C
0xC5C
Offset
0x88C
0x89C
0xBF4
0xBF8
0xC00
0xC04
0xC08
0xC10
0xC14
0xC18
0xC40
0xC44
0xC48
0xC50
0xC54
0xC58
0x880
0x884
0x888
0x890
0x894
0x898
Table A-21. Enhanced Three-Speed Ethernet Controllers (eTSECs) Registers (continued)
GADDR0—Group address register 0
GADDR1—Group address register 1
GADDR2—Group address register 2
GADDR3—Group address register 3
GADDR4—Group address register 4
GADDR5—Group address register 5
GADDR6—Group address register 6
GADDR7—Group address register 7
Reserved
Reserved
ATTR—Attribute register
ATTRELI*—Attribute extract length and extract index register
RQPRM0*—Receive Queue Parameters register 0
RQPRM1*—Receive Queue Parameters register 1
RQPRM2*—Receive Queue Parameters register 2
RQPRM3*—Receive Queue Parameters register 3
RQPRM4*—Receive Queue Parameters register 4
RQPRM5*—Receive Queue Parameters register 5
RQPRM6*—Receive Queue Parameters register 6
RQPRM7*—Receive Queue Parameters register 7
Reserved
RFBPTR0*—Last Free RxBD pointer for ring 0
Reserved
RFBPTR1*—Last Free RxBD pointer for ring 1
Reserved
RFBPTR2*—Last Free RxBD pointer for ring 2
Reserved
RFBPTR3*—Last Free RxBD pointer for ring 3
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
eTSEC 1—Block Base Address 0x2_4000
eTSEC 2—Block Base Address 0x2_5000
Name
eTSEC Lossless Flow Control Registers
eTSEC DMA Attribute Registers
1
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
16.5.3.7.2/16-105
16.5.3.8.1/16-106
16.5.3.8.2/16-106
16.5.3.9.1/16-107
16.5.3.9.2/16-108
16.5.3.9.2/16-108
16.5.3.9.2/16-108
16.5.3.9.2/16-108
Section/Page
—
—
—
—
—
—
A-29