MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 285

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.5.3
Each bit in SIPNR_H and SIPNR_L, shown in
source (implemented bits are listed in
controller sets the corresponding SIPNR bit. When a pending interrupt is handled, the user clears the
SIPNR bit by clearing the corresponding event register bit.
Note that SIPNR bit positions are not changed according to relative priority.
Table 8-7
and SIMSR_H.
Freescale Semiconductor
Offset 0x08
Reset
W
R
0
Interrupt ID Number
lists implemented SIPNR_H fields. Note that these field descriptions are also valid for SIFCR_H
System Internal Interrupt Pending Registers (SIPNR_H and
SIPNR_L)
95–127
91–93
94
Figure 8-4. System Internal Interrupt Pending Register (SIPNR_H)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
Table 8-6. IVEC/CVEC/MVEC Field Definition (continued)
Table 8-7. SIPNR_H/SIFCR_H/SIMSR_H Bit Assignments
11–15
Bits
7–9
10
16
17
18
19
0
1
2
3
4
5
6
INT
Interrupt Meaning
Table
n (Implemented bits are listed in
DMAC Err
Reserved
Reserved
8-7). When an interrupt request is received, the interrupt
Figure 8-4
PCI Express CNT
TSEC1 Err
TSEC2 Err
TSEC1 Rx
TSEC2 Rx
TSEC1 Tx
TSEC2 Tx
All zeros
USB DR
eSDHC
MSIR1
DMAC
Field
—
—
—
and
Figure
Integrated Programmable Interrupt Controller (IPIC)
Table
8-5, is assigned an internal interrupt
0b101_1011–0b101_1101
0b101_1100–0b111_1111
8-7.)
Interrupt Vector
0b101_1110
Access: Read only
8-11
31