MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 69

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
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— Master or slave I
— On-chip digital filtering rejects spikes on the bus
General purpose DMA engine
— Support for the DMA engine with the following features:
— Support for scatter/gather DMA processing
DUART
— Two 2-wire interfaces (RxD and TxD)
— Programming model compatible with the original 16450 UART and the PC16550D
Serial peripheral interface (SPI)
— Master or slave support
System timers
— Periodic interrupt timer
— Software watchdog timer
— Four general-purpose timers
Enhanced secure digital host controller (eSDHC)
— Conforms to the SD Host Controller Standard Specification Version 2.0 including test event
— Compatible with the MMC System Specification Version 4.0
— Compatible with the SD Memory Card Specification Version 2.0 and supports the high-capacity
— Compatible with the SD Card Specification, Part E1, SD Input/Output (SDIO) Card
— Designed to work with SD Memory, miniSD Memory, SDIO, miniSDIO, SD Combo, MMC,
— Card bus clock frequency up to 50 MHz
— Supports 1-/4-bit SD and SDIO modes,
— Supports single- and multi-block read and write
– Four DMA channels
– All data movement via dual-address transfers: read from source, write to destination
– Transfer control descriptor (TCD) organized to support two-deep, nested transfer operations
– Channel activation using one of two methods (for both the methods, one activation per
– Support for fixed-priority and round-robin channel arbitration
– Channel completion reported via optional interrupt requests
register support
SD memory card
Specification, Version 2.0
MMCplus, and RS-MMC cards
– Up to 200 Mbps of data transfer for SD/SDIO/MMC cards using four parallel data lines
execution of the minor loop is required):
– Explicit software initiation
– Initiation via a channel-to-channel linking mechanism for continuous transfers
(independent channel linking at end of minor loop and/or major loop)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 0
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C mode support
Overview
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