MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 995

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

12.12.3 ONFi BA NAND Device Boot
i.MX28 ROM supports boot from ONFI-BA (Open NAND Flash Interface - Block
Abstracted) NAND. BA-NAND manages ECC, bad-blocks and wear-leveling inside its
controller. ROM reads ONFI NAND device’s parameter page to determine if the NAND
device is ONFI-BA. The command set of BA NAND is different from the traditional raw
NAND devices. For ONFI-BA NAND, ROM expects the first sector to contain a MBR with
partition table. One of the partitions is firmware partition. ROM then expects a configuration
block to be present on the first sector of firmware partition. The configuration block will
have start address for FW1 and FW2.
Here is the data structure of configuration block, it is same as config block described in SD
Boot.
#define FIRMWARE_CONFIG_BLOCK_SIGNATURE
Freescale Semiconductor, Inc.
ROM4:15..8
ROM4:23..16
ROM4:31
Register
typedef struct _DriveInfo_t
{
uint32_t
uint32_t
uint32_t
// Below field u32FirstSectorNumber should be divisible by 4. Protocol is set to 4 sectors
// of 512 bytes. Firmware can start at sectors 4, 8, 12, 16, ...
uint32_t
uint32_t
} DriveInfo_t;
typedef struct _ConfigBlock_t
{
uint32_t
uint32_t
uint32_t
uint32_t
DriveInfo_t aDriveInfo[];
//!< structure to be able to add more drives in future
//!< without changing ROM code
} ConfigBlock_t;
NAND_READ_CMD_CODE1
NAND_READ_CMD_CODE2
NAND_BADBLOCK_MARKER_PRE-
SERVE_DISABLE
u32ChipNum;
u32DriveType;
u32Tag;
u32FirstSectorNumber;
u32SectorCount;
u32Signature;
u32PrimaryBootTag;
u32SecondaryBootTag;
u32NumCopies;
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
//!< Drive Tag
Name
//!< Chip Select, ROM does not use it
//!< Always system drive, ROM does not use it
//!< Not used by ROM
//!< Signature 0x00112233
//!< Num elements in aFWSizeLoc array
//!< Let array aDriveInfo be last in this data
//!< Start sector/block address of firmware.
//!< Primary boot drive identified by this tag
//!< Secondary boot drive identified by this tag
Eight bits for NAND read cmd code 1. If not programmed, ROM will
default to 0 as NAND read cmd code 1. For BA NAND, these bits
should be programmed to a value of 0xC0.
Eight bits for NAND read cmd code 2. If not programmed, ROM will
default to 0x30 as NAND read cmd code 2.
One bit to indicate that bad block marker byte is not preserved for
page data, this will result in ROM not swapping metadata[0] with bad
block byte offset in page data. This bit should never be programmed.
It is available to cover up any defective ROM code in handling bad
block marker byte swapping.
(0x00112233) //STMP
Description
Chapter 12 Boot Modes
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