MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1833

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

The example in
and stored in two queues (see the orange cells in the figure).
29.5.3 Write Control Module
The Write Control Module receives frames from the Switch engine, partitions and stores
the frames in the shared memory. The cell numbers used to store the frame are forwarded
to the port output managers.
29.5.4 Cell Factory Module
The Cell Factory implements the cell management, it always provides a free cell number
to the write control module so, the write control module can immediately start writing into
memory to avoid any write latency.
29.5.5.1 Overview
The Output Queue Manager implements, per port, the individual queue FIFOs (One queue
FIFO per priority). The queue FIFOs are addressed by the priority information extracted
by the Switch classification engine. Per port, eight prioritized queues are implemented.
When more than one queue has data available, the read logic selects one of the queues with
a Weighted Fair Queuing scheduling algorithm.
Freescale Semiconductor, Inc.
Figure 29-15
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
use count
per cell
1
1
1
2
1
1
Figure 29-15. Cell Storage Concept
Shared Memory
shows the storage of three frames with one frame duplicated
cell 41
cell 40
cell 33
cell 27
cell 20
cell 12
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
Queue 1 FIFO
last cell length
last cell length
# 12
# 27 (eop)
# 40 (eop)
Queue 2 FIFO
last cell length
# 41 (eop)
# 33
# 20
Queue 3 FIFO
last cell length
# 27 (eop)
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