MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 669
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 669 of 2327
- Download datasheet (17Mb)
Chapter 9
Pin Control and GPIO (PinCtrl)
9.1 Pin Control and GPIO Overview
The i.MX28 digital interface pins have the following features: (In the context of this chapter,
"digital pin" means the standard digital interface pins. This does not include test pins used
for boundary scan control.)
Freescale Semiconductor, Inc.
• The device has seven banks of pins, Banks 0~4 serve as GPIOs. Banks 5 and 6 contain
• Each GPIO pin has separate control on voltage(1.8 V/3.3 V), Interrupt (trigger
• All non-EMI digital pins have selectable output drive strengths as described in
• Each group of EMI data[7:0], data[15:8], control pins and address pins, dual pads
• All digital pins have weak internal keepers to minimize power loss due to undriven
• All EMI pins' internal keepers can be disabled to allow them to change to a
• The following pin interfaces have selectable pull up resistors:
• The following pin interfaces are slow transitioning pins with internal Schmidt Triggers
the EMI sixteen data pins and EMI control/address signals, they are not multiplexed
with other functions since all the use cases require at least sixteen bit external memory.
type/polarity).
Drive Strength
(clk/clkn/dqs#/dqs#n), have selectable output drive strengths.
pins.
high-impedance state (as required by some DRAM manufacturers).
for noise immunity:
• SSP data - 47 k
• SSP command/detect - 10 k
• GPMI chip enable - 47 k
• GPMI ready/busy - 10 k
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Selection.
Pin
669
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