MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1354

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Boundary Scan Interface
There is a special instruction which is called IOCFG that is implemented to load the I/O
configuration register. The I/O configuration register is used to program the voltage levels
of pins. It has 126 bits, corresponding to the 126 GPIO pins in the device. If there is a 0 in
a certain bit location, then the GPIO corresponding to that location will be programmed to
a 1.8 V level. The default value, which is 1, corresponds to a pin being programmed to a
3.3 V level. This register is provided so that the pins that are connected to 1.8 V peripherals
can be programmed to the correct voltage level before running the board level tests.
The customer will be provided a BSDL file which is in a format that is used by the board
tester. This file will detail the sequence of the pad connection in the boundary scan chain,
and the properties of the pads. This is used by the board level tester to develop the tests for
connectivity of the chip.
1354
EXTEST
SAMPLE/PRELOAD
BYPASS
IDCODE
HIGHZ
IOCFG
Instruction
0000
0001
1111
0010
0011
0101
Code
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
This instruction places the IC into an external boundary-test mode and selects the boundary-scan
register to be connected between TDI and TDO. During this instruction, the boundary-scan register
is accessed to drive test data off-chip through the boundary outputs and receive test data off-chip
through the boundary inputs.
This instruction takes the data on the I/O pad and latches it into the boundary scan register.
This instruction is used to bypass the chip during board testing.
This instruction allows a code to be serially read from the component. The Chip level JTAG ID
Code of i.MX28 is 0x0882401D.
This instruction places the component in a state, in which all of its system logic outputs are placed
in an inactive drive state.
This user-defined instruction is used to program the voltage level of pins.
Table 18-2. Boundary Scan Instruction Set
Description
Freescale Semiconductor, Inc.