MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1960

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Difference between USB0 and USB1
The USB 2.0 PHY is fully integrated on-chip and is described in
PHY is controlled over the APBX peripheral bus.
31.2 Difference between USB0 and USB1
As mentioned above, USB0 is the High speed OTG-capable USB controller and USB1 is
the host only high speed USB controller.
1960
Figure 31-1. USB 2.0 Device Controller Block Diagram
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
AHB-to-APBX
Bridge
APBX Master
AHB Slave
• Bus Interface
• Control and Status
• Interrupts
Programmed I/O
Target Inteface
Interface Block
ARM Core
USB 2.0 Device/
USB
Host/OTG
Controller
480-MHz PLL
AHB
Registers
• Bus Interface
• Endpoint Priming State Machine
• Data Movement
• Virtual FIFO Channels
• DMA Contexts
• Interval Timers
• Error Handling
• CRC Handling
• Asynchronous Clock Domain Crossing
• Transceiver Interface Logic
PHY
Dual Port RAM Controller
SRAM
Protocol Engine
Synchronous SRAM
DMA Engine
On-Chip Dual Port
USB UTM Interface
Port Controller
USB 2.0 PHY
USB Xcvr
Integrated
EMI
USB PHY
Freescale Semiconductor, Inc.
Overview. The