MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1809

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
The Switch APB interface and interrupt signals are disabled and should not be used. To
control the Frame transfer from DMA0 and DMA1, the ENET-MAC 0 and the ENET-MAC
1 APB interfaces and interrupt signals should be used.
Ethernet
Ethernet
Port 0
Port 1
ENET-MAC 0
ENET-MAC 1
Switch
'0'
sx_ena
Bypass Port
DMA0
DMA1
Figure 29-3. Passthrough Mode Configuration Overview
29.3.3 Switch Mode
When the Switch is programmed to operate in Switch Mode (sx_ena set to '1'), the Bypass
Mode (Port 1) interface is disabled and should not be used.
Frame transfers to and from the Line are performed on Port 0 only (DMA 0). The Transmit
status signals are generated from the Switch Port 0 Receive Buffer and the DMA control
signals from the Switch Register Space. The ENET-MAC 0 and ENET-MAC 1 Transmit
status and DMA control signals are not used.
The ENET-MAC 0 and ENET-MAC 1 APB interfaces and interrupts are enabled and can
be used to monitor the line activity and gather the line statistic information.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.
1809

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