MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1307
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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16.6.17 KES Debug Read Register (HW_BCH_DBGKESREAD)
The hardware BCH ECC accelerator key equation solver internal state machines and signals
can be seen in the ECC debug registers.
EXAMPLE
Address:
Re-
Freescale Semiconductor, Inc.
set
BM_KES_TEST_
Bit
W
R
DEBUG_REG_
KES_DEBUG_
STANDALONE
KES_DEBUG_
KES_DEBUG_
31
BYPASS
SELECT
0
RSVD0
STALL
KES_
STEP
KICK
Field
7 6
5 0
12
11
10
30
9
8
0
29
0
HW_BCH_DBGKESREAD
28
0
Toggling causes KES engine FSM to start as if kick by the Bus Master. This allows stand alone testing of
the KES and Chien Search engines. Be sure to set KES_BCH_DEBUG0_KES_STANDALONE mode to 1
before kicking.
Set to one to cause the KES engine to suppress toggling the KES_BM_DONE signal to the bus master and
to suppress toggling the CF_BM_DONE signal by the CF engine.
0x0
0x1
Toggling this bit causes the KES FSM to skip passed the stall state if it is in DEBUG_STALL mode and it
has completed processing a block.
Set to one to cause KES FSM to stall after notifying Chien search engine to start processing its block but
before notifying the bus master that the KES computation is complete. This allows a diagnostic to stall the
FSM after each blocks key equations are solved. This also has the effect of stalling the CSFE search engine
so it's state can be examined after it finishes processing the KES stalled block.
0x0
0x1
1 = Point all synd_gen writes to dummy area at the end of the AUXILLIARY block so that diagnostics can
preload all payload, parity bytes and computed syndrome bytes for test the KES engine.
0x0
0x1
Reserved, always set these bits to zero.
The value loaded in this bit field is used to select the internal register state view of KES engine or the Chien
search engine.
27
0
26
0
NORMAL — Bus master address generator for synd_gen writes operates normally.
TEST_MODE — Bus master address generator always addresses last four bytes in Auxilliary block.
NORMAL — KES FSM proceeds to next block supplied by bus master.
WAIT — KES FSM waits after current equations are solved and the search engine is started.
NORMAL — Bus master address generator for synd_gen writes operates normally.
TEST_MODE — Bus master address generator always addresses last four bytes in Auxilliary block.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
HW_BCH_DEBUG0 field descriptions (continued)
0
24
0
23
0
22
0
21
0
8000_A000h base + 110h offset = 8000_A110h
20
0
19
0
18
0
17
0
VALUES
16
0
15
0
Description
Chapter 16 20-BIT Correcting ECC Accelerator (BCH)
14
0
13
0
12
0
11
0
10
0
0
9
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
1307
0
0
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