MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2070

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Operation
10. Set the WORD_LENGTH field appropriately: 0 = 16-bit input, 1 = 8-bit input, 2 =
11. Set the READ_MODE_NUM_PACKED_SUBWORDS field in HW_LCDIF_CTRL2
12. Set the READ_PACK_DIR to 1 if it is required to store the data in big-endian format.
13. Set the LCD_DATABUS_WIDTH appropriately: 0 = 16-bit output, 1 = 8-bit output,
14. Enable the necessary IRQs.
33.2.6 MPU Interface
The MPU interface is used to transfer data and commands between the internal buffer of
LCD controller/display and the MPU or vice versa at relatively lower speeds. LCDIF can
support the 6800 as well as the 8080 MPU protocol. If DOTCLK_MODE, DVI_MODE
and VSYNC_MODE bits in HW_LCDIF_CTRL registers are 0, it implies that the block is
in MPU interface mode of operation. The LCDIF MPU mode has four basic timing
parameters: Setup and Hold for the Command/Data register selection (TCS, TCH) and Setup
and Hold for the Data bus (TDS, TDH). These parameters are expressed in
CLK_DIS_LCDIFn cycles. The LCD_WR signal is used as the write strobe while LCD_RS
signal is typically used to switch between command and data modes.
Figure 33-11
protocols.
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7. Select the DMA mode by making the LCDIF_MASTER bit in HW_LCDIF_CTRL
8. Also, set the DATA_SHIFT_DIR and SHIFT_NUM_BITS if it is required to shift the
9. Indicate if the read data needs to color-space-converted and stored in a different RGB
register 0.
data left or right before it is output.
format by setting the READ_MODE_OUTPUT_IN_RGB_FORMAT field accordingly.
18-bit input, 3 = 24-bit input if READ_MODE_OUTPUT_IN_RGB_FORMAT is
required. Also, select the correct 16/18/24 bit data format with the corresponding fields
in HW_LCDIF_CTRL register.
according to the number of subwords per word required to be packed.
2 = 18-bit output, 3 = 24-bit output.
shows the timing-related information in the write mode of both 6800 and 8080
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.