MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2280

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
38.5.4 LRADC Control Register 3 (HW_LRADC_CTRL3)
The LRADC touch panel control register specifies the voltages at which a touch detect
interrupt is generated.
HW_LRADC_CTRL3: 0x030
HW_LRADC_CTRL3_SET: 0x034
HW_LRADC_CTRL3_CLR: 0x038
HW_LRADC_CTRL3_TOG: 0x03C
The LRADC touch detect control and status register controls the voltage at which a touch
detection interrupt is generated. This register also contains the interrupt request status bit
and enable bit for the touch detection interrupt request to the CPU's IRQ interrupt input.
EXAMPLE
BW_LRADC_CTRL3_HIGH_TIME(BV_LRADC_CTRL3_HIGH_TIME__83NS);
BW_LRADC_CTRL3_INVERT_CLOCK(BV_LRADC_CTRL3_INVERT_CLOCK__NORMAL);
2280
Field
0xD
0xC
0xB
0xA
0x9
0x8
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
260 — 260uA.
240 — 240uA.
220 — 220uA.
200 — 200uA.
180 — 180uA.
160 — 160uA.
140 — 140uA.
120 — 120uA.
100 — 100uA.
80 — 80uA.
60 — 60uA.
40 — 40uA.
20 — 20uA.
ZERO — 0uA.
HW_LRADC_CTRL2 field descriptions (continued)
Description
Freescale Semiconductor, Inc.

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