MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2069

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
10. Set the BYTE_PACKING_FORMAT field in HW_LCDIF_CTRL1 according to the
11. Set the LCD_DATABUS_WIDTH appropriately: 0 = 16-bit output, 1 = 8-bit output,
12. Enable the necessary IRQs.
33.2.5.2 MPU Read Mode
The following initialization steps should be done to enter the MPU read mode of operation:
Initialization steps:
Freescale Semiconductor, Inc.
5. Reset the LCD controller by setting LCDIF_CTRL1_RESET bit appropriately, being
6. Make sure READ_WRITEB bit in HW_LCDIF_CTRL register is 0.
7. Select AXI bus master mode by setting the LCDIF_MASTER bit in HW_LCDIF_CTRL
8. Set the INPUT_DATA_SWIZZLE according to the endianness of the LCD controller.
9. Set the WORD_LENGTH field appropriately: 0 = 16-bit input, 1 = 8-bit input, 2 =
1. To select the pins and their directions for talking to the LCD panel, set the appropriate
2. Start the CLK_DIS_LCDIFn and set the appropriate frequency by programming the
3. Start the HCLK and set the appropriate frequency by programming the registers in
4. Bring the LCDIF out of soft reset and clock gate.
5. Reset the LCD controller by setting LCDIF_CTRL1_RESET bit appropriately, being
6. Set the READ_WRITEB bit in HW_LCDIF_CTRL register to 1.
careful to observe the reset requirements of the controller. See
for more information on Reset requirements.
register to 1.
Also, set the DATA_SHIFT_DIR and SHIFT_NUM_BITS if it is required to shift the
data left or right before it is output.
18-bit input, 3 = 24-bit input. Also, select the correct 16/18/24 bit data format with the
corresponding fields in HW_LCDIF_CTRL register.
input frame.
2 = 18-bit output, 3 = 24-bit output.
bits in the HW_PINCTRL_MUXSELx registers in the PINCTRL block.
registers in CLKCTRL.
CLKCTRL.
careful to observe the reset requirements of the controller.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 33 LCD Interface (LCDIF)
Behavior During Reset
2069

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