MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1874

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
29.9.35 ENET SWI Port Snooping function. Eight independent entries
TCP/UDP Port number Snooping function configuration.
Note: it is possible to set both the compare source/dest bits. The result is OR'ed, meaning
if any of the fields match the compare value, the frame is processed as defined by the mode
bits.
Address:
1874
Reset
Reset
DESTINATION_
COMPARE_
COMPARE_
Bit
Bit
SOURCE
W
W
RSRVD0
R
R
MODE
31 16
PORT
DEST
15 5
Field
2 1
4
3
31
15
0
0
HW_ENET_SWI_PORTSNOOP2 800F_8000h base + C4h offset = 800F_
80C4h
are available. (HW_ENET_SWI_PORTSNOOP2)
30
14
0
0
The 16-bit port number to compare within the TCP or UDP header of a frame.
Reserved bits. Write as 0.
When set, the TCP or UDP source port number field within the frame is compared with the compare value
provided in 31:16.
When set, the TCP or UDP destination port number field within the frame is compared with the compare
value provided in 31:16.
Defines the forwarding that should occur, when an IP frame is received and the protocol field matches the
protocol value (see bits 15:8).
Bits 2:1:
00: forward frame to designated management port only 01: copy to management port and forward normally
10: discard
Note: the management port is defined in register MGMT_CONFIG.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI_PORTSNOOP2 field descriptions
28
12
0
0
27
11
0
0
RSRVD0
26
10
0
0
25
0
0
9
DESTINATION_PORT
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
MODE
17
0
0
1
16
0
0
0

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