MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1782

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Programmable Registers
28.4.1 PWM Control and Status Register (HW_PWM_CTRL)
The PWM Control and Status Register specifies the reset state, availability, and the enables
for the eight PWM units.
HW_PWM_CTRL: 0x000
HW_PWM_CTRL_SET: 0x004
HW_PWM_CTRL_CLR: 0x008
HW_PWM_CTRL_TOG: 0x00C
EXAMPLE
1782
HW_PWM_CTRL_WR(0x000000ff);
8006_40C0
8006_40D0
8006_4040
8006_4050
8006_4060
8006_4070
8006_4080
8006_4090
8006_40A0
8006_40B0
8006_40E0
8006_40F0
8006_4100
8006_4110
Absolute
address
(hex)
PWM Channel 1 Period Register (HW_PWM_PERIOD1)
PWM Channel 2 Active Register (HW_PWM_ACTIVE2)
PWM Channel 2 Period Register (HW_PWM_PERIOD2)
PWM Channel 3 Active Register (HW_PWM_ACTIVE3)
PWM Channel 3 Period Register (HW_PWM_PERIOD3)
PWM Channel 4 Active Register (HW_PWM_ACTIVE4)
PWM Channel 4 Period Register (HW_PWM_PERIOD4)
PWM Channel 5 Active Register (HW_PWM_ACTIVE5)
PWM Channel 5 Period Register (HW_PWM_PERIOD5)
PWM Channel 6 Active Register (HW_PWM_ACTIVE6)
PWM Channel 6 Period Register (HW_PWM_PERIOD6)
PWM Channel 7 Active Register (HW_PWM_ACTIVE7)
PWM Channel 7 Period Register (HW_PWM_PERIOD7)
PWM Version Register (HW_PWM_VERSION)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_PWM memory map (continued)
Register name
// Enable all channels
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Freescale Semiconductor, Inc.
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0106_0000h
28.4.10/1794
28.4.11/1795
28.4.12/1797
28.4.13/1797
28.4.14/1799
28.4.15/1800
28.4.16/1802
28.4.17/1802
28.4.18/1804
28.4.5/1788
28.4.6/1789
28.4.7/1790
28.4.8/1792
28.4.9/1792
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