MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1130

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Programmable Registers
14.8.25 DRAM Control Register 27 (HW_DRAM_CTL27)
This is a DRAM configuration register.
Address:
1130
Reset
Reset
BANK_SPLIT_EN
RW_SAME_EN
SWAP_PORT_
SWAP_EN
Bit
Bit
W
W
R
R
RSVD4
RSVD3
RSVD2
31 25
23 17
Field
15 9
24
16
8
31
15
0
0
HW_DRAM_CTL27
30
14
0
0
Always write zeroes to this field.
No meaning for this MC.
When swapping in enabled (swap_en is set to 'b1), this parameter enables swapping between read commands
on the same port from different requestors. Commands from the same requestor can not be swapped.
While read data may be interleaved, write data must be accepted in order on a port. The MC logic will not
swap write commands from the same port, even if this bit is enabled.
This situation will be uncommon since all read commands on the same port enter the command queue at
the priority defined in axiY_r_priority. However, this situation may occur through command aging.
'b0 = Disabled
'b1 = Enabled
Always write zeroes to this field.
Enable command swapping logic in execution unit.
Enables swapping of the active command for a new higher-priority command when using the placement
logic.
'b0 = Disabled
'b1 = Enabled
Always write zeroes to this field.
Enable bank splitting for cmd queue placement logic.
Enables bank splitting as a condition when using the placement logic to fill the command queue.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
RSVD4
RSVD2
28
12
0
0
800E_0000h base + 6Ch offset = 800E_006Ch
HW_DRAM_CTL27 field descriptions
27
11
0
0
26
10
0
0
25
0
0
9
SWAP_
SAME_
PORT_
RW_
EN
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
RSVD3
RSVD1
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0