MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2006

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
2006
Field
OCA
CSC
PEC
PE
4
3
2
1
For host/OTG implementations, the user can provide over-current detection to the vbus_pwr_fault input for
this condition.
For device-only implementations, this bit shall always be 0.
Over-Current Active.
0 = This port does not have an over-current condition.
1 = This port currently has an over-current condition.
Default = 0.
This bit will automatically transition from 1 to 0 when the over current condition is removed.
For host/OTG implementations the user can provide over-current detection to the vbus_pwr_fault input for
this condition.
For device-only implementations this bit shall always be 0.
Port Enable/Disable Change.
0 = No change.
1 = Port enabled/disabled status has changed.
Default = 0.
In Host Mode:
For the root hub, this bit gets set to a 1 only when a port is disabled due to disconnect on the port or due to
the appropriate conditions existing at the EOF2 point (See Chapter 11 of the USB Specification). Software
clears this by writing a 1 to it.
This field is 0 if Port Power (PP) is 0.
In Device Mode:
The device port is always enabled. (This bit will be 0)
Port Enabled/Disabled.
0 = Disable.
1 = Enable.
Default = 0.
In Host Mode:
Ports can only be enabled by the host controller as a part of the reset and enable. Software cannot enable
a port by writing a 1 to this field. Ports can be disabled by either a fault condition (disconnect event or other
fault condition) or by the host software. Note that the bit status does not change until the port state actually
changes. There may be a delay in disabling or enabling a port due to other host controller and bus events.
When the port is disabled, (0) downstream propagation of data is blocked except for reset.
This field is 0 if Port Power (PP) is 0 in host mode.
In Device Mode:
The device port is always enabled. (This bit will be 1)
Connect Status Change.
0 = No change.
1 = Change in Current Connect Status.
HW_USBCTRL_PORTSC1 field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Description
Freescale Semiconductor, Inc.

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