MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1927
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1927 of 2327
- Download datasheet (17Mb)
Address:
Re-
29.9.104 ENET SWI Port 2 Outgoing frames discarded due to output
Port 2 Outgoing frames discarded due to output Queue congestion.
Address:
Re-
29.9.105 ENET SWI Port 2 incoming frames discarded due to
(HW_ENET_SWI_IDISC_VLAN2)
Port 2 incoming frames discarded due to mismatching or missing VLAN id while VLAN
verification was enabled See also Register VLAN_VERIFY.
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
BLOCKED1
31
31
0
0
ODISC2
IDISC_
Field
31 0
Field
31 0
30
30
0
0
29
29
0
0
HW_ENET_SWI_IDISC_BLOCKED1
832Ch
HW_ENET_SWI_ODISC2
28
28
0
0
Queue congestion (HW_ENET_SWI_ODISC2)
mismatching or missing VLAN id
ENET SWI Port 1 incoming frames discarded (after learning) as port is configured in blocking mode
ENET SWI Port 2 Outgoing frames discarded due to output Queue congestion
27
27
0
0
26
26
0
0
HW_ENET_SWI_IDISC_BLOCKED1 field descriptions
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
HW_ENET_SWI_ODISC2 field descriptions
23
23
0
0
22
22
0
0
21
21
0
0
800F_8000h base + 330h offset = 800F_8330h
20
20
0
0
19
19
0
0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
18
18
800F_8000h base + 32Ch offset = 800F_
0
0
IDISC_BLOCKED1
17
17
0
0
ODISC2
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1927
0
0
0
0
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