MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1155

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

14.8.52 DRAM Control Register 56 (HW_DRAM_CTL56)
This is a DRAM configuration register.
Address:
14.8.53 DRAM Control Register 58 (HW_DRAM_CTL58)
This is a DRAM configuration register.
Freescale Semiconductor, Inc.
Reset
Reset
ARB_CMD_Q_
THRESHOLD
OBSOLETE
PRIORITY
Bit
Bit
W
W
AXI3_R_
R
R
RSVD1
RSVD1
Field
Field
31 8
7 3
2 0
7 3
2 0
31
15
0
0
HW_DRAM_CTL56
30
14
0
0
Always write zeroes to this field.
Priority of read cmds from AXI port 3.
Always write zeroes to this field.
Always write zeroes to this field.
Threshold for cmd queue fullness related to overflow.
Sets the command queue fullness that determines if ports will be allowed to overflow. This parameter is
used in conjunction with the axiY_bdw_ovflow parameters.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
OBSOLETE[15:8]
HW_DRAM_CTL55 field descriptions (continued)
28
12
0
0
800E_0000h base + E0h offset = 800E_00E0h
HW_DRAM_CTL56 field descriptions
27
11
0
0
26
10
0
0
25
0
0
9
OBSOLETE[31:16]
24
0
0
8
Description
Description
23
0
0
7
22
0
0
6
Chapter 14 External Memory Interface (EMI)
RSVD1
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
ARB_CMD_Q_
THRESHOLD
17
0
0
1
1155
16
0
0
0