MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 10

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Section Number
10
6.1
6.2
6.3
6.4
6.5
AHB-to-APBH Bridge Overview.................................................................................................................................343
APBH DMA.................................................................................................................................................................345
Implementation Examples............................................................................................................................................350
Behavior During Reset..................................................................................................................................................352
Programmable Registers...............................................................................................................................................352
5.4.137
5.4.138
5.4.139
5.4.140
5.4.141
5.4.142
5.4.143
5.4.144
5.4.145
5.4.146
6.3.1
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.5.7
6.5.8
6.5.9
6.5.10
6.5.11
Interrupt Collector Interrupt Register 127 (HW_ICOLLINTERRUPT127).............................................333
Interrupt Collector Debug Register 0 (HW_ICOLLDEBUG)...................................................................335
Interrupt Collector Debug Read Register 0 (HW_ICOLLDBGREAD0)..................................................337
Interrupt Collector Debug Read Register 1 (HW_ICOLLDBGREAD1)..................................................337
Interrupt Collector Debug Flag Register (HW_ICOLLDBGFLAG)........................................................338
Interrupt Collector Debug Read Request Register 0 (HW_ICOLLDBGREQUEST0).............................339
Interrupt Collector Debug Read Request Register 1 (HW_ICOLLDBGREQUEST1).............................340
Interrupt Collector Debug Read Request Register 2 (HW_ICOLLDBGREQUEST2).............................340
Interrupt Collector Debug Read Request Register 3 (HW_ICOLLDBGREQUEST3).............................341
Interrupt Collector Version Register (HW_ICOLLVERSION).................................................................342
NAND Read Status Polling Example........................................................................................................350
AHB to APBH Bridge Control and Status Register 0 (HW_APBHCTRL0)............................................358
AHB to APBH Bridge Control and Status Register 1 (HW_APBHCTRL1)............................................359
AHB to APBH Bridge Control and Status Register 2 (HW_APBHCTRL2)............................................363
AHB to APBH Bridge Channel Register (HW_APBHCHANNEL_CTRL)............................................367
AHB to APBH DMA Device Assignment Register (HW_APBHDEVSEL)............................................369
AHB to APBH DMA burst size (HW_APBHDMA_BURST_SIZE).......................................................370
AHB to APBH DMA Debug Register (HW_APBHDEBUG)..................................................................371
APBH DMA Channel 0 Current Command Address Register (HW_APBHCH0_CURCMDAR)..........372
APBH DMA Channel 0 Next Command Address Register (HW_APBHCH0_NXTCMDAR)...............373
APBH DMA Channel 0 Command Register (HW_APBHCH0_CMD)...................................................373
APBH DMA Channel 0 Buffer Address Register (HW_APBHCH0_BAR).............................................376
AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 6
Title
Freescale Semiconductor, Inc.
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